Recently, research and development of spin electronics devices using the spin freedom of electrons has been actively performed. Studies based on tunnel magnetoresistance (TMR) effect are gaining vigor, and are now applied to magnetic random access memories (MRAMs) and reproducing heads of hard disk drives (HDDs).
MRAMs are expected as next-generation working memories required to fulfil the low-power-consumption demand since they are nonvolatile and can be written a great number of times. An MRAM includes magnetic tunnel junction (MTJ) elements in which a thin tunnel barrier is sandwiched between a magnetization fixed layer and a magnetization free layer. The MRAM is written by causing electric current to flow through the elements by spin transfer torque switching.
A spin-based MOSFET, which includes a ferromagnetic element and a metal-oxide-semiconductor field effect transistor (MOSFET), have both a memory function and a transistor function. Reconfigurable logic circuits including spin-based MOSFETs are proposed, in which the spin-based MOSFETs constitute basic logic gates such as AND gates and OR gates, and the connections of these basic logic gates can be changed by rewriting the magnetization states of the magnetic materials. The logical circuits of a reconfigurable logic circuit can be changed after the hardware is manufactured. Spin-based MOSFETs are expected to achieve low-power-consumption reconfigurable logic circuits.
In conventional working memories such as dynamic random access memories (DRAMs) and MRAMs, one memory cell includes one transistor and one memory element. In the DRAMs, the memory element is a capacitance. In the MRAMs, the memory element is a magnetic tunnel junction (MTJ) element.
The memory element may be made smaller than the transistor, and may be formed on the transistor. Therefore, the size of the memory cell is determined by the size of the transistor. Assuming that the minimum feature size in the process rule is Dmin, the minimum size of the memory cell is 6×Dmin2 due to the structure of the transistor.
If a memory is formed with conventional spin-based MOSFETs, in which the source and the drain are formed of a magnetization free layer with a ferromagnetic material and a magnetization pinned layer with a ferromagnetic material, the minimum size of the memory cell is 6×Dmin2. Thus, the integration degree of such a memory is the same as that of conventional working memories.
A spin-based MOSFET has a logic function of the transistor and a memory function obtained from the magnetoresistance effect. Conventional spin-based MOSFETs are perpendicularly integrated relative to the substrate. However, in the in-plane direction, the integration degree of the spin-based MOSFETs is about the same as that of the conventional working memories.
Thus, working memories including conventional spin-based MOSFETs do not have a greater advantage in integration than existing working memories.